Find your next AI-scored role.

Software engineer at MatX designing and implementing compilers for proprietary hardware architecture. Focus on midend and backend development, register allocation, instruction scheduling, and loop optimizations for AGI compute platform.

SOC Integration Engineer at MatX designing full-chip RTL for AGI compute hardware. Responsible for integrating subsystems, managing clock/reset methodologies, and automating SOC top-level design flows using SystemVerilog and Python.

SOC Architect at MatX designing next-generation AI-focused server-class silicon. Lead architecture translation from PRDs to SoC-level designs, define memory/interconnect/power systems, and drive PPA trade-offs across hardware and software teams.

SOC Architect at MatX designing next-generation AI-focused server-class silicon. Lead SoC architecture from PRDs through productization, defining memory, interconnects, power, and performance trade-offs for AI hardware acceleration.

ASIC/SOC silicon verification engineer at MatX building custom AI accelerator silicon. Responsible for verification methodology, testbenches, and coverage closure across subsystems and full-chip validation for high-performance compute and memory systems.

ASIC/SOC Physical Design CAD Engineer at MatX building silicon for GenAI. Develop and maintain RTL-to-GDSII physical design flow, automate backend runs, evaluate EDA tools, and support design teams on leading-edge process nodes.

ASIC/SOC silicon physical design engineer at MatX building AI accelerator chips. Responsible for RTL-to-GDSII physical design, floorplanning, place & route, and sign-off across compute and memory subsystems in leading-edge process nodes.

Runtime Engineer at MatX building the host-side stack for custom silicon inference and training accelerators. Owns device memory management, Python bindings, LLM serving infrastructure, and hardware-software contracts across compiler, runtime, and kernel layers.

Hardware Systems Electrical Engineer at MatX designing compute boards and interconnects for AI data center platforms. Responsible for board design, schematic capture, verification, and lab bring-up for rack-scale AI infrastructure.

Hardware System Diagnostic Engineer at MatX building diagnostics test suites for AI accelerator boards and rack-scale data center products. Owns end-to-end testing for manufacturing, debugging, and deployment of custom silicon systems.

Formal Verification Engineer at MatX building AI hardware and compiler infrastructure. Apply model checking, theorem proving, and formal methods to verify RTL, memory systems, and compiler correctness across the full stack.

Senior/Staff Emulation Engineer at MatX building infrastructure and debug flows for advanced connectivity SoCs. Role spans RTL, software, tooling, and system debug across emulation, simulation, and post-silicon validation for AGI compute platforms.

Silicon Design-for-Test engineer at MatX building AGI compute hardware. Responsible for DFT implementation, PHY firmware loading, test program development, and silicon bring-up across leading-edge process nodes.

Bluespec Design Engineer at MatX building silicon for GenAI. Design production hardware RTL using Bluespec (a functional hardware description language), develop reusable libraries, and shape chip architecture. Requires strong Haskell proficiency; prior hardware experience not required.

Hardware architect at MatX designing silicon for AI models. Responsible for full-chip or subsystem architecture, performance optimization, and cross-team collaboration on vertically integrated hardware-software solutions.

Staff Software Engineer at Reddit leading technical strategy for the Onboarding team, which owns the first-time user experience. Focus on signal-collection systems, personalization pipelines, and experimentation infrastructure serving 126M daily active users.

Senior Staff Backend Engineer at Affirm building the lakehouse analytics platform. Focus on Snowflake architecture, data governance, RBAC, and analytics engineering infrastructure serving the company's analytical data ecosystem.

Senior AI GRC Engineer at Vanta leading governance, risk, and compliance initiatives for internal AI adoption and customer-facing AI products. Builds scalable guardrails, implements AI governance frameworks like ISO 42001, and champions responsible AI usage across the company.

Manager, Software Engineering at Figma leading the Growth Platform team. Build capabilities for growth experiments, integrate AI-driven quality checks, and partner cross-functionally with marketing and product teams.

Manager of Software Engineering at Figma leading the AI Tools team. Responsible for building and operating AI-powered developer workflows, cloud agent platforms, and workflow orchestration systems that improve productivity across the engineering organization.

Staff Field Application Engineer at Tenstorrent, a custom AI silicon company. Work directly with enterprise customers to solve AI/ML technical challenges, provide product feedback, and drive adoption of Tenstorrent's hardware and software platform.

Senior ML Engineer at Instacart building optimization and ML systems for order batching, shopper assignment, and routing in a high-scale fulfillment marketplace. Focus on combinatorial optimization, real-time decisioning, and production deployment.

Senior AI Transformation and Operations Engineer at Gong building internal AI use cases, proof-of-concepts, and enterprise AI operations infrastructure. Identifies high-value AI opportunities, deploys agentic workflows, and manages AI stack performance and governance.

Staff/Senior Software Engineer at Anthropic building inference deployment infrastructure. Focus on orchestrating continuous deployment of Claude across GPU, TPU, and Trainium fleets with resource-constrained optimization.

Engineering Manager at Vanta leading a team building the Vanta Agent product, an AI-first platform for automating audit readiness work. Manage 7+ engineers shipping LLM-backed features with human-in-the-loop controls for security compliance.