Find your next AI-scored role.

Data Quality Specialist at Mistral AI reviewing code annotations for LLM training data and maintaining internal annotation tooling. Hybrid role combining quality auditing, rubric-based evaluation, and developer-facing tool support.

AI Engineer at Asana building enterprise AI workflows and integrations. Focus on LLM orchestration, RAG systems, agent frameworks, and automation platforms to drive GTM processes.

Director of Customer Engineering at Tenstorrent leading technical relationships with strategic customers for custom AI silicon. Owns conversion of customer requirements into hardware and software specifications, coordinating RTL changes and NEO customization across teams.

Senior Staff ML Engineer at Airbnb building evaluation systems and data flywheels for generative AI customer support products. Leads technical direction for LLM evaluation, dataset curation, and continuous improvement infrastructure across CSxAI initiatives.

Member of Engineering (Post-training) at Poolside, focused on turning pre-trained LLMs into well-aligned AI systems for coding. Responsibilities include building data pipelines, researching post-training algorithms, designing experiments, and maintaining training infrastructure.

Senior Staff Software Engineer at Airbnb building the Trust Platform for fraud detection and safety. Designs distributed systems for trust decisioning, mentors engineers, and champions AI-first engineering with LLM-powered code generation.

Sr. Principal AI Systems Architect at Fivetran building the architecture for an AI analyst system. Owns metadata contracts, tool interfaces, context assembly, prompt orchestration, evaluation loops, and operational patterns for production agent systems.

Solutions Architect at Cloudflare helping customers build applications on the Developer Platform and AI services. Combines technical architecture expertise with sales enablement, designing proofs of concept and advising on cloud infrastructure and serverless solutions.

Software engineer at Cloudflare building network reliability infrastructure for the Argo platform. Focus on systems-level programming in Rust/Go, networking protocols, and distributed systems serving millions of Internet properties.

Senior Threat Intelligence Engineer at Cloudflare building ML-driven threat detection and automated security defenses. Combines threat intelligence analysis with machine learning to reduce detection and response times for sophisticated cyber threats.

Product Designer at Mistral AI designing cloud and infrastructure platforms (Koyeb, Mistral Cloud) for developers and enterprises. Focus on end-to-end experiences for AI inference deployment, monitoring, and scaling with integration into Mistral Studio.

Delivery Solutions Architect at Databricks responsible for post-sale technical strategy and execution across the Databricks Data Intelligence Platform. Leads complex customer onboarding, use-case adoption, and technical program delivery for enterprise accounts.

Solutions Architect at LangChain designing and deploying production AI agent infrastructure for enterprise customers. Combines infrastructure engineering, agent system architecture, and customer-facing technical leadership.

Senior physical design engineer at Tenstorrent leading chiplet and chip-top implementation for high-performance CPU-based SoCs in advanced nodes (5nm and below). Responsibilities include floorplanning, place-and-route, physical verification, and mentoring junior engineers on a multi-chiplet system-in-package project.

Power Design Engineer at Tenstorrent leading power analysis and optimization for a 2nm CPU chiplet. Responsibilities include RTL/netlist power analysis using Joules and PrimePower, power vector planning, and collaboration with RTL, synthesis, and physical design teams.

Enterprise Field Engineer at Replit driving technical adoption of the agentic software platform. Combines pre-sales architecture design, live application building, and post-sales expansion for strategic accounts worth $5M+ ARR.

Staff Machine Learning Engineer at Twilio building data pipelines, ML infrastructure, and real-time intelligence systems for the Trust Intelligence Platform. Focus on orchestration, feature stores, model training/inference, and cloud-native MLOps.

Machine Learning Engineer at Airbnb building agentic AI systems for customer support. Focus on LLM fine-tuning, multi-agent orchestration, RAG, and production ML infrastructure for Chat and Voice AI assistants.

Physical Design Engineer at Tenstorrent leading Die-to-Die interface implementation from RTL to GDSII for multi-die chiplet architectures. Requires 5+ years at advanced nodes with expertise in high-speed interfaces, timing closure, and full physical design flow.

Verification Engineer at Tenstorrent verifying digital IP and SoC logic at chiplet integration level. Build verification infrastructure, testbenches, and test plans for a high-performance RISC-V CPU platform. Requires 10+ years verification experience and advanced degree in EE/CS.

Technical Program Manager at Tenstorrent driving end-to-end execution of next-generation SoCs from architecture through tape-out and post-silicon validation. Requires 10+ years semiconductor experience and strong technical depth in silicon development alongside program management expertise.

Staff Technical Program Manager at Tenstorrent managing end-to-end delivery of AI model IP and software stack to customer environments. Bridges compiler, hardware, and runtime teams to ensure performance, correctness, and deployability of AI systems on custom accelerators.

Staff physical design engineer at Tenstorrent implementing high-performance CPU and AI/ML accelerator blocks. Owns synthesis-to-tapeout flow, optimizing performance, power, and area on advanced process nodes.

Staff Engineer leading emulation infrastructure and technical strategy for Tenstorrent's high-performance RISC-V CPUs. Focus on CPU verification, debug workflows, and cross-functional collaboration to enable silicon bring-up and customer systems.

Sr Staff Engineer at Tenstorrent designing RTL and SoC architectures for AI chips. Focus on microarchitecture, Verilog/VHDL implementation, and performance optimization for compute and memory systems.