Find your next AI-scored role.

SOC Architect at MatX designing next-generation AI-focused server-class silicon. Lead architecture translation from PRDs to SoC-level designs, define memory/interconnect/power systems, and drive PPA trade-offs across hardware and software teams.

SOC Architect at MatX designing next-generation AI-focused server-class silicon. Lead SoC architecture from PRDs through productization, defining memory, interconnects, power, and performance trade-offs for AI hardware acceleration.

ASIC/SOC silicon verification engineer at MatX building custom AI accelerator silicon. Responsible for verification methodology, testbenches, and coverage closure across subsystems and full-chip validation for high-performance compute and memory systems.

ASIC/SOC Physical Design CAD Engineer at MatX building silicon for GenAI. Develop and maintain RTL-to-GDSII physical design flow, automate backend runs, evaluate EDA tools, and support design teams on leading-edge process nodes.

ASIC/SOC silicon physical design engineer at MatX building AI accelerator chips. Responsible for RTL-to-GDSII physical design, floorplanning, place & route, and sign-off across compute and memory subsystems in leading-edge process nodes.

Silicon micro-architect and RTL designer at MatX building vertically integrated hardware and software for AGI compute. Responsible for subsystem and chip-level silicon design from architecture through sign-off, focusing on high-performance compute, memory, and connectivity.

Build Systems Engineer at MatX, a custom AI accelerator silicon company. Owns Bazel build graph, toolchains, EDA tool integrations, and CI infrastructure. Focus on hermeticity, performance, and build system design.

Runtime Engineer at MatX building the host-side stack for custom silicon inference and training accelerators. Owns device memory management, Python bindings, LLM serving infrastructure, and hardware-software contracts across compiler, runtime, and kernel layers.

Hardware Systems Electrical Engineer at MatX designing compute boards and interconnects for AI data center platforms. Responsible for board design, schematic capture, verification, and lab bring-up for rack-scale AI infrastructure.

Hardware System Diagnostic Engineer at MatX building diagnostics test suites for AI accelerator boards and rack-scale data center products. Owns end-to-end testing for manufacturing, debugging, and deployment of custom silicon systems.

Formal Verification Engineer at MatX building AI hardware and compiler infrastructure. Apply model checking, theorem proving, and formal methods to verify RTL, memory systems, and compiler correctness across the full stack.

Senior/Staff Emulation Engineer at MatX building infrastructure and debug flows for advanced connectivity SoCs. Role spans RTL, software, tooling, and system debug across emulation, simulation, and post-silicon validation for AGI compute platforms.

Silicon Design-for-Test engineer at MatX building AGI compute hardware. Responsible for DFT implementation, PHY firmware loading, test program development, and silicon bring-up across leading-edge process nodes.

Bluespec Design Engineer at MatX building silicon for GenAI. Design production hardware RTL using Bluespec (a functional hardware description language), develop reusable libraries, and shape chip architecture. Requires strong Haskell proficiency; prior hardware experience not required.

Hardware architect at MatX designing silicon for AI models. Responsible for full-chip or subsystem architecture, performance optimization, and cross-team collaboration on vertically integrated hardware-software solutions.

Staff Software Engineer at Anduril Industries building mission-critical software for Lattice OS, an AI-powered military command and control platform. Focus on distributed systems, networking, autonomy integration, and field deployment for tactical edge computing.

Staff Software Engineer at Anduril Industries building mission-critical defense software for Lattice OS and connected warfare systems. Focus on distributed systems, networking, autonomy integration, and field deployment for tactical edge platforms.

Staff Software Engineer at Anduril Industries building mission-critical software for Lattice OS, an AI-powered military command and control platform. Focus on distributed systems, networking, autonomy integration, and field deployment for tactical edge computing.

Software engineer at Anduril Industries building mission-critical software for the Connected Warfare division. Focus on distributed systems, networking, autonomy, and data processing for tactical edge platforms deployed to military customers.

Software engineer at Anduril Industries building mission-critical software for the Connected Warfare division. Focus on distributed systems, networking, autonomy, and data processing for tactical edge platforms serving military customers.

Staff Software Engineer at Reddit leading technical strategy for the Onboarding team, which owns the first-time user experience. Focus on signal-collection systems, personalization pipelines, and experimentation infrastructure serving 126M daily active users.

Senior Infrastructure Engineer at Dropbox building a next-generation search platform to power Dropbox Dash and unified search experiences. Focus on scalable indexing infrastructure, vector search, and multi-modal retrieval at global scale.

Software engineer at Anduril Industries building mission-critical defense software on Lattice OS, an AI-powered operating system. Focus on distributed systems, networking, autonomy, and sensor fusion for tactical edge platforms. Requires active U.S. Secret Clearance and 3-10+ years of software engineering experience.

Software engineer at Anduril Industries building mission-critical defense software on Lattice OS, an AI-powered operating system. Focus on distributed systems, networking, autonomy, and systems integration for tactical edge platforms.

Software engineer at Anduril Industries building mission-critical software for Lattice OS, an AI-powered military command and control platform. Focus on distributed systems, networking, autonomy, and systems integration for tactical edge deployment.